1. Field of the Invention
This invention relates to an improved process for fabrication of printed circuit boards and to the boards so prepared and is more particularly concerned with a process for fabrication of multilayer printed circuit boards by printing each consecutive layer on the preceding layer, and with the multilayer boards so produced.
2. Description of the Prior Art
Multilayer printed circuit boards are currently prepared by a rather complex process in which a plurality of single boards are prepared separately and then laminated together using heat and pressure. Generally the individual boards, which can be prepared by any of the procedures conventionally employed for single printed circuit boards, are provided with tooling holes to assure good registration during imaging and lamination. Optionally, but preferably, the copper circuitry on the boards is coated with a layer of black copper oxide to improve adhesion of the board to an epoxy prepreg sheet which is to be interposed between adjacent boards prior to lamination. The layers are arranged in proper sequence and registration with epoxy or like resin prepregs (usually reinforced with fiberglass and the like) interleaved and separating each board from its neighbors. The stack of boards and prepregs is held between the cauls (preferably preheated) of a press and subjected to pressure and heat for a time and at a pressure such that adhesion is achieved. Generally the laminate is subjected to postcure at an elevated temperature. The resulting laminate must be drilled and any epoxy resin which has become smeared in the drill holes is cleaned out. Electroless copper plating of the holes is then carried out to achieve electrical connection between the various layers of circuitry. As will be readily apparent, the accuracy of registration of the circuitry in the layers as well as the accuracy of drilling are critical factors in achieving satisfactory performance of the resulting board. One of the many difficulties inherent in this process lies in the tendency of the various single boards to float on the softened epoxy or other resin employed in the prepreg and to move out of correct registration. Another problem lies in the difficulty of ensuring that all resin smears have been cleaned from the holes drilled through the finished laminate. Difficulties can also arise to achieve uniformity of pressure across the boards during the lamination process.
This invention is directed to a novel process for the fabrication of multilayer printed circuit boards which process avoids the necessity to laminate a series of single boards and thereby avoids the major problems inherent in the lamination process as discussed above. The principal feature of the novel process of this invention is that the multilayer board is built up gradually by forming each layer in situ on the previously formed layer, and with its circuitry properly oriented with respect to that of the previous layer. Thus, the circuitry in each layer is formed by depositing on the previous layer a circuit pattern formed from a non-conductive suspension of a metal oxide in a curable resin, subjecting the particles of metal oxide at or near the surface of said pattern to chemical reduction to form conductive metal particles which can then receive a coating of electroless copper thus forming the desired circuit pattern. The unreduced metal oxide particles remaining in the interior of the resin serve to insulate dielectrically the newly formed and plated circuit pattern from that in the previous layer except at the interconnections between the two circuitry patterns at predetermined locations.
The metallization of substrates, by coating of the substrate with a suspension of a metal oxide in a resinous material followed by chemical reduction of at least some of the particles of metal oxide to metal thereby rendering the surface sufficiently conductive to be electrolessly plated with metal, has been described previously. Thus, Schneble et al U.S. Pat. No. 3,146,125 describes forming a printed circuit board by coating a substrate with a suspension of cuprous oxide particles in a resin, producing an image of a circuit pattern on the resin layer using a resist, reducing the cuprous oxide particles (or at least those nearest the surface) in the exposed circuit pattern and adding additional copper thickness by electroless plating of the circuit pattern now made conductive by the reduced copper particles.
Schneble et al U.S. Pat. No. 3,347,724 describes a similar process used with a flexible substrate which may also contain through-holes. Both patents teach the use of acids, preferably sulfuric acid, as the reducing agent for the cuprous oxide. Such techniques suffer the disadvantage that disproportionation occurs resulting in equimolar amounts of metallic copper and the copper salt of the acid used. The result is that the density of metallic copper particles per unit surface is limited and the addition of further copper is limited to the electroless rather than the electroplating method. Further the use of the technique with boards containing through-holes is difficult because of the need to clear excess resin from the holes as well as the difficulty of achieving buildup of an adequate level of copper in the through-holes after reduction of the cuprous oxide.
Letter et al U.S. Pat. No. 3,551,304 teach a related technique of printing a circuit on a glass substrate by coating the latter with a layer of tin oxide, masking predetermined areas, reducing the tin oxide to tin in the exposed areas, removing the mask and unreduced tin oxide from the masked areas, and, optionally, plating the tin circuit pattern.
Polichette et al U.S. Pat. No. 3,772,056 describe the metallization of substrates by coating the latter with a layer of a metal salt, reducing the salt to form a layer of non-conductive metal by radiant energy or chemical reducing agents, then electrolessly depositing metal on the areas containing reduced metal. Printed circuits are among the metallized substrates which can be produced in this manner and the production of printed circuit boards is the subject of companion U.S. Pat. No. 3,907,621 which issued on a continuation-in-part of the application which gave rise to the '056 patent. Polichette et al U.S. Pat. No. 3,772,078 is directed to the production of a selected pattern of non-conducting metallic nuclei using the above process but employing a radiation-sensitive reducing agent in conjunction with a secondary reducer in acid medium in order to reduce the metallic salt. Companion U.S. Pat. No. 3,930,963, based on a continuation-in-part of the application on which the '078 patent issued is directed to the preparation of printed circuit boards using the process described in the '078 patent.
Polichette et al U.S. Pat. No. 3,956,041 describes a transfer process for applying a layer of resin, optionally containing cuprous oxide particles suspended therein, to a substrate.
Cassat et al U.S. Pat. No. 4,564,424 teach the formation of conductive metallized surfaces on polymeric film substrates by depositing on the latter a suspension of particles of a metal oxide such as cuprous oxide in a film-forming polymer matrix, disrupting the surface of the layer so deposited, for example, by stretching or drawing the film substrate, and then chemically reducing the exposed metal oxide particles to form a layer of electrically conducting metal particles on to which further metal can be electrodeposited. In companion U.S. Pat. No. 4,565,606 the process of the '424 patent is applied to the metallization of a polyimide/polyamide film substrate.
Cassat U.S. Pat. No. 4,590,115 describes the preparation of a plastic article metallized on at least one side. The article is first molded into the desired shape using a polymeric resin having a high density of metal oxide particles uniformly suspended therein. At least one surface of the article is then subjected to the action of a chemical reducing agent to form a layer of free metal particles on said surface and additional metal is then electrodeposited on the surface which has been made electrically conducting by the reduction step.
It has not been suggested previously that the technique of forming metallized layers or circuit pattern images using suspensions of metal oxide particles in a resin followed by reduction of the metal oxide to metal could be employed in the preparation of multiple layer printed circuit boards. Nor has it been recognized that the inner layers of such boards could be produced by techniques other than manufacture of a plurality of individual boards which must then be carefully assembled in registry one with another each board being separated from its neighbors by a layer of material such as reinforced epoxy resin before being laminated together by heat and pressure. It has now been found that the layers of a multiple circuit board can be produced in situ by a sequence of steps which do not involve a heat and pressure lamination nor an etching process in the individual layers and which thereby possess marked advantages over the processes previously employed. Additional advantages which are a characteristic of the process of this invention will become apparent from the detailed description which follows.